Abstract
An algorithm is presented for the minimal state-space realization of a two-dimensional (2-D) transfer function for the special case when the numerator or the denominator of the 2-D transfer function is factorable. The state-space representation is directly derived by inspection from a circuit block diagram realization of the 2-D system. The present algorithm does not require that the numerator or the denominator polynomial is factored out, as opposed to known techniques.
| Original language | English |
|---|---|
| Pages (from-to) | 1055-1058 |
| Number of pages | 4 |
| Journal | IEEE transactions on circuits and systems |
| Volume | 35 |
| Issue number | 8 |
| DOIs | |
| State | Published - Aug 1988 |